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DIL/NetPC ADNP/9200

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SBC for Embedded Networking with Dual Ethernet, USB and Wireless Expansion: DIL/NetPC ADNP/9200

The DIL/NetPC ADNP/9200 provides a very compact Atmel 180 MHz AT91RM9200 ARM9-based low power embedded controller with USB support, TCP/IP stack, web server, Telnet server, (T)FTP support for embedded networking with Ethernet, USB and wireless connectivity in industrial and laboratory environments. The ADNP/9200 offers the footprint of a 128-pin QIL (Quad-In-Line) socket with 2.54 mm centers (0.1 inch pin grid) and the hardware and software features necessary to add embedded networking capabilities to any product design. The ADNP/9200 was developed specifically for products which need to be connected to 10/100 Mbps Ethernet-based TCP/IP networks and wireless/M2M gateway applications with minimum development costs.

DIL/NetPC ADNP/9200

The ADNP/9200 comes as ready-to-run embedded networking system for Ethernet and wireless/M2M gateway applications. The use of the ADNP/9200 will allow you to realize substantial time and costs savings over other chip-based approaches. Currently, there is no other embedded networking solution with pre-installed O/S, wireless expansion, USB host/device, 10/100 Mbps Ethernet- and TCP/IP-based and more development time saving features on the market. There is also no faster Time-to-Market for your product with lower costs if USB host/device, 10/100 Mbps Ethernet, full TCP/IP and an embedded Web server or other TCP/IP-based server software are required.

DIL/NetPC

To interface the ADNP/9200 with existing devices and equipment, the ADNP/9200 offers three asynchronous serial RS232C ports with TTL levels (COM1 with handshake signals, COM2 only TxD and RxD, COM3 only TxD and RxD - available over expansion sandwich layer), one USB device port, two USB host ports (compliance with USB 2.0 full-speed and low-speed specification), two 10/100 Mbps Ethernet interfaces, 20-bit general purpose high-speed parallel I/Os, ESL (Expansion Sandwich Layer) connector for wireless expansion and a 16-bit extension bus with interrupt input and chip select outputs. There are two ways for ADNP/9200 integration: 1. Adapt the ADNP/9200 to your existing product. Use the existing I/Os within your product to communicate with the ADNP/9200. 2. Use the ADNP/9200 to control and monitor the hardware of your existing product. This might enable you to replace your existing controller entirely. In a new product design, the ADNP/9200 can be the main controller. Additional I/Os are driven by the 16-bit extension bus and the ESL connector.

The on-board FLASH memory provides storage for the ADNP/9200 operating system with USB driver code, TCP/IP stack and embedded web server as well as OEM applications and data. The FLASH memory is in-system programmable over JTAG, serial and Ethernet interfaces. The boot block of the FLASH memory is only in-system programmable over the JTAG interface through a special cable attached to a PC parallel port. For all other FLASH blocks, you can use also a high-speed serial connection through the ADNP/9200 COM1 port or the 10/100 Mbps Ethernet interfaces for in-system programming. The ADNP/9200 in-system programming was developed for OEM application software, operating system download (i.e. upgrade the embedded Linux O/S) and data download and also to make it easier to update the on-board FLASH content in the field.

DIL/NetPC ADNP/9200: Key Features

  • Atmel AT91RM9200 32-bit ARM9 MCU with 180 MHz Clock Speed
  • 200 MIPS @ 180 MHz
  • 64 Mbyte 32-bit SDRAM Memory
  • 32 MByte FLASH Memory
  • Two 10/100 Mbps Ethernet Interfaces
  • Two USB Host Ports (full-speed and low-speed)
  • One USB Device Port (full-speed and low-speed)
  • One Serial Peripheral Interface (SPI)
  • Three Serial Ports (one with all handshakes)
  • 20-bit General Purpose high-speed Parallel I/O
  • 16-bit I/O Expansion Bus
  • ESL (Expansion Sandwich Layer) connector for WSN (Wireless Sensor Network), Wi-Fi, GSM/GPRS and UMTS/HSPA expansion
  • 1 Interrupt Inputs, 4 Chip Select Outputs
  • Programmable Watchdog Timer
  • JTAG IEEE 1149.1 Test Interface
  • In-System Programming Features
  • 128-pin JEDEC QIL-128 Connector, 2.54 mm Centers
  • 3.3 Volt Low Power Design, Supply Voltage 3.3 VDC (+- 5%)
  • Supply Current 300 mA typ. @ 180 MHz
  • 0 °C to +70 °C Operating Temperature
  • Size 82 mm * 36 mm

DIL/NetPC ADNP/9200: Memory Map

Physical Addr. Range Description Access Format AT91RM9200 Pin
0x0000.0000-0x0FFF.FFFF AT91RM9200 Internal Memory 32-bit R/W ---
0x1000.0000-0x1FFF.FFFF 16 Mbyte FLASH Memory Chip 1 16-bit R/W NCS0#
0x2000.0000-0x2FFF.FFFF 64 Mbyte SDRAM Memory 32-bit R/W NCS1#
0x3000.0000-0x3FFF.FFFF 16 Mbyte FLASH Memory Chip 2 16-bit R/W NCS2#
0x4000.0000-0x403F.FFFF Chip Select Signal CS1 16-bit R/W NCS3#
0x4080.0000-0x40BF.FFFF IDE Chip Select 0 (Pin 88) 16-bit R/W NCS3#
0x40C0.0000-0x40FF.FFFF IDE Chip Select 1 (Pin 89) 16-bit R/W NCS3#
0x5000.0000-0x5FFF.FFFF Chip Select Signal CS2 16-bit R/W NCS4#
0x6000.0000-0x6FFF.FFFF Chip Select Signal CS3 16-bit R/W NCS5#
0x7000.0000-0x7FFF.FFFF Chip Select Signal CS4 16-bit R/W NCS6#
0x8000.0000-0x8FFF.FFFF 2nd Ethernet LAN Controller 16-bit R/W NCS7#
0xF000.0000-0xFFFF.FFFF AT91RM9200 Internal Registers 32-bit R/W ---

Please note: The mapping and access details of the address range 0x0000.0000 – 0x0FFF.FFFF (AT91RM9200 Internal Memory) depends on the AT91RM9200 configuration. Please see the AT91RM9200 user manual for more information.

DIL/NetPC ADNP/9200: Ordering Information

Ordercode Product
ADNP/9200 DIL/NetPC with 180 MHz AT91RM9200, 32 MByte FLASH, 64 MByte SDRAM, Firmware in FLASH, 3.3 VDC Vcc.
E2G/ESL1 ADNP/9200 ESL (Expansion Sandwich Layer) module with Motorola G24 for GSM/GPRS mobile networks.
E2U/ESL1 ADNP/9200 ESL (Expansion Sandwich Layer) module with Motorola H24 for UMTS/HSPA mobile networks.
E2W/ESL1 ADNP/9200 ESL (Expansion Sandwich Layer) module for 2.4 GHz IEEE 802.11 Wi-Fi networks.
E2Z/ESL1 ADNP/9200 ESL (Expansion Sandwich Layer) module for 2.4 GHz IEEE 802.15.4/ZigBee networks.


SSV EMBEDDED SYSTEMS. Board Level Products. File: dnp0080.htm, Last Update: 15.Jan.2012
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